Free Download Synopsys IC Validator vX-2025.06 | 13.7 GbSynopsys IC Validator is a physical verification solution for semiconductor design that supports signoff workflows across mature and advanced process nodes. It provides capabilities for checking physical layouts and verifying designs before manufacturing.
The software is designed for demanding semiconductor verification workflows, including design rule checking (DRC), layout versus schematic (LVS), and fill analysis. Its distributed processing architecture supports large-scale verification workloads and can scale across more than 4,000 CPU cores.
IC Validator integrates with the Synopsys Fusion Compiler RTL-to-GDSII solution and IC Compiler II place-and-route system within the Fusion Design Platform. This integration allows signoff-quality analysis and automatic repair to be performed within the implementation environment.